1. Field of the Invention
The present invention relates generally to a receiver in a radio communication system, and in particular, to a receiver for sampling an intermediate frequency (IF) signal and then performing digital signal processing on the sampled signal.
2. Description of the Related Art
A conventional receiver samples a received signal and performs digital signal processing on the sampled signal in an RF (Radio Frequency) unit or an IF unit, for signal selection or detection. A block diagram of the conventional receiver is illustrated in FIG. 4.
Referring to FIG. 4, a phase locked loop (PLL) 102 outputs a local signal depending on a reference signal, the reference signal being an output signal of a DSP (Digital Signal Processing)-based signal generator 103. A first set of mixers 101a and 101b convert a received RF signal to IF signals using the local signal. The IF signals, after being sampled into digital signals, are converted to baseband signals by digital signal processing in a second set of mixers 111a and 111b in a digital down-converter 110.
In the conventional receiver, a local oscillator, or a direct digital synthesizer (DDS), used for the first mixers 101a and 101b, generates spurious signals due to the inherent operation of a reference signal generator. Among the spurious signals, a spurious signal whose frequency is positioned apart from a local frequency is suppressed by the phase locked loop 102, but a spurious signal of which frequency is close to the local frequency is not suppressed, increasing interference to an adjacent channel.
Several attempts have been made to solve this problem, among them are (1) increasing an operation precision to decrease a level of the spurious signal from the DSP-based signal generator to a tolerable level, (2) adopting a dither technique to reduce a spurious peak level by spreading the spurious signal generated from the local oscillator used as the DSP-based signal generator, and (3) using a frequency where the spurious signal is not generated, based on the fact that generation of the spurious signal by the local oscillator depends upon an oscillation frequency of the local oscillator. Using the spurious-free frequency, a method for selecting a best combination out of combinations of frequency division and multiplication values of the phase locked loop and output frequencies of the local oscillator is typically used. However, it is known that a reduction in bandwidth of a DDS-driven phase locked loop such as the phase locked loop 102 desirably narrows a band where the spurious signals are not suppressed, but undesirably lowers a response speed of the phase locked loop.
However, the above listed attempts to reduce the spurious signal (1) cause an increase in circuit scale and power consumption, (2) also cause an increase in circuit scale and power consumption, though less than when the measurement of decreasing the spurious level has been taken, and a deterioration in a carrier-to-noise ratio (C/N), and (3) cause the restriction of available frequencies. In particular, if an output frequency of the DSP-based signal generator is increased in order to improve a response characteristic of the phase locked loop and a C/N characteristic, then a weight of the power consumption by a digital signal processor is undesirably increased.